October 2017 edition – Vol.9 no.8

EDITORIAL

On October 12th the participants in the 6th edition of the ReSMiQ Innovation Day gathered at Polytechnique Montréal to attend the keynote speeches and several technical demonstrations. This annual event organized by our center aims to give visibility to the research work done by graduate and undergraduate students of the province of Quebec in the field of microsystems. We wish to thank Mounir Boukadoum from UQAM and Benoit Gosselin from Université Laval, both members of ReSMiQ, as well as Jose M. de la Rosa from the university of Sevilla in Spain and Hao Yu from the Southern University of Science and Technology in Shenzhen in China for their involvement.

Students at all levels (CEGEP, university undergraduate and graduate) showed their scientific and technical expertise during a competition through experimental demonstrations to a jury constituted of many experts. The best projects in each category were awarded prizes as well as special awards from IEEE Montréal and the Montréal Chapter of the IEEE SSCS society. This year, 12 projects were presented (more details). We thank all the students who submitted their project as well as congratulate the winners. We hope to see more new innovations for the next edition in October 2018.

Undergraduate level winner


Bague IMU pour contrôle d’un bras robotique pour assistance quotidienne

by Tristan Robitaille (DEC), Collège Sainte-Anne

Graduate level winners


1e prix –
Un SoC CMOS Mixte en Technologie 0.13 μm pour l’Optogénétique et l’Enregistrement Neuronal en Boucle Fermée
by Gabriel Gagnon-Turcotte (Ph.D.), Université Laval


2e prix –
Wireless Optoelectronic Interface Enabling Brain Fiber Photometry in Freely Behaving Rodents
by Mehdi Noormohammadi Khiarak (Ph.D.), Université Laval


3e prix – Rotational MEMS Platform for Optical Switching
by Suraj Sharma (Ph.D.), École de technologie supérieure

Prix spéciaux

Prix IEEE Montréal
Multimodal implantable neural interfacing microsystem

by Massoud Rezaei (Ph.D.), Université Laval

Prix IEEE Montréal SSCS Chapter
Wireless power and data transmissions in harsh environment applications
by Ahmad Hassan (Ph.D.), Polytechnique Montréal

ReSMiQ is a group of researchers in an interuniversity research center that can count on the support of the Fonds de recherche du Québec – Nature et technologies (FRQNT) and nine (9) Quebec universities involved in microsystems research.

NEWS FROM OUR MEMBERS

Achievements
– Dr. Massicotte from UQTR received a grant from MITACS as part of their Accelerate program in partnership with the company Simaudio.

Exposure
– Dr. Frédéric Nabki from ETS and Dr. Michael Ménard from UQAM are collaborating on the development of a chip in partnership with company Aeponyx and was praised as one of the “Ten great inventions made in Québec” by the magazine Québec Science.
More details

Involvment
– Dr. Warren Gross from McGill University is the general co-chair of IEEE GlobalSIP 2017  to be held in Montréal from November 14 to 16, 2018.

More details

RESMIQ’S ACTIVITIES

Intensive course
Title : Conception IPC intégrée des PCB HDI pour les cartes électroniques en haute fréquence
Date: November 22 and 23, 2017
Place:
Université de Sherbrooke, Centre d’excellence en système intelligents intégrés
Plus de détails

Scholarships and financial support
Scholarship and financial support for graduate students
APPLICATION DEADLINE: January 15, 2018
More details

Bourse scholarship for postdoctoral fellows
APPLICATION DEADLINE: January 15, 2018
More details


SIGNAL is the main monthly information medium of the Microsystems Strategic Alliance of Québec (ReSMiQ). This newsletter aims to be an active link between the members of ReSMiQ and all individuals who have an interest in research and innovation in microsystems. We commit ourselves to promote in it our members’ research and increase ReSMiQ’s visibility.

ReSMiQ is a group of researchers in an interuniversity research center that can count on the support of the Fonds de recherche du Québec – Nature et technologies (FRQNT) and nine (9) Quebec universities involved in microsystems research.

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UPCOMING CONFERENCES

Call for contributions

31st Canadian Conference on Electrical & Computer engineering (CCECE),
from May 13 to 16, 2018, Québec, Canada.
Submission deadline : January 18, 2018.
More details

16th IEEE International NEWCAS Conference (NEWCAS),
from June 24 to 27, 2018, Montréal, Canada.
Submission deadline : February 17, 2018.
More details

61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS),
from August 5 to 8, 2018, Windsor, ON, Canada.
Submission deadline : March 18, 2018.
More details

IEEE Biomedical Circuits and Systems Conference (BioCAS2018),
from October 17 to 19, 2018, Cleveland, U.S.A.
Submission deadline : March 18, 2018.
More details

Call for participation

2017 International Conference on Electronics, Circuits and Systems (ICECS),
from December 5 to 8, 2017, Batumi, Georgia.

More details

IEEE International Conference on Microelectronics (ICM 2017),
from December 10 to 13, 2017, Beirut, Lebanon.

More details

2018 International Symposium on Circuits and Systems (ISCAS),
from May 27 to 30, 2018, Florence, Italy.
Tous les détails

MEMBER PROFILE

Prof. Yves Blaquière
Polytechnique Montréal
Member of ReSMiQ since 2014

Le Pr Yves Blaquière a obtenu son doctorat en génie électrique de l'École Polytechnique de Montréal, Canada. Actuellement, il est professeur agrégé du Département de génie électrique de l'École de technologie supérieure (ETS) et membre du Laboratoire de communications et d'intégration microélectronique (LACIME) de l'ETS. Il a été professeur agrégé en génie microélectronique et directeur du Laboratoire de recherche en conception microélectronique de l'Université du Québec à Montréal (UQAM). Il a également été directeur du programme de génie microélectronique et directeur du génie à l'UQAM. Il a travaillé sur des projets en collaboration avec plusieurs sociétés de microélectronique telles que Gestion TechnoCap Inc., DreamWafer Division, Hyperchip Inc. Ses intérêts de recherche concernent la conception des ASIC/FPGA, les microsystèmes VLSI/WSI, les circuits numériques à grande vitesse, les outils d’analyse temporelle, les architectures, la tolérance aux pannes et applications au traitement du signal, les processeurs de réseau à haute vitesse et les commutateurs. Le professeur Blaquière détient un brevet, a contribué à 12 chapitres de livres et a publié plusieurs articles dans des revues et conférences internationales avec comité de lecture.

More details

Below is a selection of publications in recent years followed by representative work.

  1. Hussain W, Fakhoury H, Desgreys P, Blaquiere Y, and Savaria Y, "An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, pp. 751-762, 2016.
  2. Souari A, Thibeault C, Blaquière Y, and Velazco R, "Towards an efficient SEU effects emulation on SRAM-based FPGAs," Microelectronics Reliability, Elsevier, vol. 66, pp. 173-182, 2016.
  3. Hussain W, Valorge O, Blaquière Y, and Savaria Y, "A novel spatially configurable differential interface for an electronic system prototyping platform," Integration-the VLSI Journal, vol. 55, pp. 129-137, 2016.
  4. Hussain W, Blaquiere Y, and Savaria Y, "An Interface for Open-Drain Bidirectional Communication in Field Programmable Interconnection Networks," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 2465-2475, 2015.
  5. Laflamme-Mayer N, Blaquiere Y, and Sawan M, "A configurable analog buffer dedicated to a wafer-scale prototyping platform," Analog Integrated Circuits Signal Processing International Journal, Springer, vol. 82, pp. 57-66, January, 2014.
  6. Laflamme-Mayer N, Blaquiere Y, Savaria Y, and Sawan M, "A Configurable Multi-Rail Power and I/O Pad Applied to Wafer-Scale Systems," Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 61, pp. 3135-3144, 2014.
  7. Darvishi M, Audet Y, Blaquiere Y, Thibeault C, Pichette S, and Tazi F Z, "Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation," Nuclear Science, IEEE Transactions on, vol. 61, pp. 3535-3542, 2014.
  8. Laflamme-Mayer N, Andre W, Valorge O, Blaquiere Y, and Sawan M, "Configurable Input/Output Power Pad for Wafer-Scale Microelectronic Systems," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 21, pp. 2024-2033, 2013.

RESEARCH CONTRIBUTIONS

An Asynchronous Delta-Modulator Based A/D Converter
for an Electronic System Prototyping Platform

This paper presents and validates a compact circuit implementation of an asynchronous Δ-modulator (ADM) for A/D conversion. This data converter was proposed as a means to propagate analog signals into digital interconnection networks. A detailed analysis of the A/D conversion mechanism of the proposed ADM circuit is presented. An analytical method is used to analyze and evaluate the inherent oscillation frequency of the proposed ADM circuit in terms of its circuit parameters. Due to the equivalence of the spectrum of the modulating input signal and the low-frequency spectrum of the ADM output, a simple low-pass filter can be used as a D/A converter to reconstruct the input analog signal. The proposed ADM was fabricated in a 0.13 μm CMOS technology. Measurement results showed SNR and SNDR of 57 and 47 dB respectively for an input bandwidth of 2 MHz. The ADM occupies 45 μm × 22 μm active area. The entire A/D and D/A converter-pair consumes 0.15 mA from a 3.3 V supply and occupies 45 μm × 46 μm area. Compared to other similar A/D converters, the proposed ADM supports moderate signal bandwidth and medium-resolution, while occupying very small area.

Fig. 1. The proposed ADM overcome the performance limiting factor (non-linearity of conversion) of the generic ASDM architecture.

Fig. 2. Detailed block diagram of the proposed ADM-based analog interface. The ADM modulates the input analog signal into 3.3 V pulses and then converts them into 1.2 V pulse. These pulses are then converted into a one-shot pulse train (by the XOR-gate) and propagated through the field programmable interconnect network (FPIN).

Fig. 3. Measured noise performances from the test-chip. (a) Measured power spectrum density (PSD) of reconstructed signal for VP-P =80% of VDD (at 1 MHz). (b) SNR/SNDR versus input amplitude.