June 2017 edition – Vol.9 no.6


The 15th edition of the IEEE International NEWCAS Conference that was held from June 25 to 28 in Strasbourg, France, was organised by Professor Luc Hébrard’s team of the Université de Strasbourg joined by some members of ReSMiQ. Launched in 2003 in Montreal, under the sponsorship of the IEEE Circuits and Systems society (CAS), it has progressively grown to become a major meeting event and is now a full-fledged IEEE conference. This world-class conference has been hosted for the fifth time across the Atlantic in France after Grenoble (2015), Paris (2013), Bordeaux (2011) and Toulouse (2009). It is worth noting that the acceptance rate of 47.5% allowed the conference to achieve a remarkable level of quality. The spectrum of research topics covered this year attracted 191 submissions from over 30 countries. These were sorted and evaluated by the members of the technical committee and external reviewers who conducted in-depth evaluation of each paper. The final selection resulted in the presentation of 73 articles in lecture sessions and 29 in poster sessions. It was also a great honor to welcome world renowned speakers who shared their knowledge and their expertise with the attendees such as Edoardo Charbon, of the École polytechnique fédérale de Lausanne, Nando Basile, of X-FAB and co-founder of Spike 3D Concept engineering, and Pantelis Georgiou, of the Imperial College in London. We congratulate all the members of the organizing committee for this success and we also take this opportunity to thank the sponsors for their support. It is in this spirit that we look forward to seeing you next year in Montréal from June 24 to 27 of 2018.

We are pleased to announce that ReSMiQ has a new member, professor Paul-Vahé Cicek of the department of computer science at Université du Québec à Montréal. He works in the field of convergent integration of microtechnologies.

ReSMiQ is a group of researchers in an interuniversity research center that can count on the support of the Fonds de recherche du Québec – Nature et technologies (FRQNT) and nine (9) Quebec universities involved in microsystems research.


– Dr. Gosselin from Université Laval is part of a team who was awarded the prize for best technical demonstration for a robotic arm at the IEEE ISCAS2017 held in Baltimore, United States.
More details / Demonstration video

– Dr. Fontaine from the Université de Sherbrooke is supervising Jonathan Bouchard at the Ph.D. who is the recipient of a Vanier scholarship for the project entitled Conception d’un scanner de tomographie d’émission par positrons. More details


Date: October 12, 2017
Venue: Polytechnique Montréal


Scholarships and financial support for graduate students
ReSMiQ Scholarship and supplementary scholarship
More details

Scholarship for post-doctoral fellow
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6th microsystems experimental demonstration competition
University undergraduate and graduate students and students from college/CEGEP of the province of Québec are invited to participate in the next competition of the 6th edition of the ReSMiQ innovation day by submitting their project. More than 5000$ in prizes!

SUBMISSION DEADLINE: September 11, 2017
More details

SIGNAL is the main monthly information medium of the Microsystems Strategic Alliance of Québec (ReSMiQ). This newsletter aims to be an active link between the members of ReSMiQ and all individuals who have an interest in research and innovation in microsystems. We commit ourselves to promote in it our members’ research and increase ReSMiQ’s visibility.

ReSMiQ is a group of researchers in an interuniversity research center that can count on the support of the Fonds de recherche du Québec – Nature et technologies (FRQNT) and nine (9) Quebec universities involved in microsystems research.

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Call for participation

17th International Forum on MPSoC for Software-defined Hardware (MPSoC’17)
from July 2 to 7, 2017, Annecy, France.

More details

11th International Conference on Verification and Evaluation of
Computer and Communication Systems (VECoS 2017),
from August 24 to 25 août 2017, Montréal, Canada.

More details

35thd IEEE International Conference on Computer Design (ICCD 2017),
from November 5 to 8, 2017, Boston, MA, USA.
More details

IEEE Biomedical Circuits and Systems Conference (BioCAS/FoodCAS 2017),
from October 19 to 21, 2017, Turin, Italy.

More details

Call for contributions

NAMIS International Autumn School 2017,
du 2 au 6 octobre, Fribourg, Allemagne.
More details

2017 International Conference on Electronics, Circuits and Systems (ICECS),
from December 5 to 8, 2017, Batumi, Georgia.

Submission deadline: July 15, 2017.
More details

IEEE International Conference on Microelectronics (ICM 2017),
du 10 au 13 décembre 2017, Beirut, Lebanon.

Date limite de soumission : 15 juillet 2017.
More details


Prof. Glenn Cowan
Concordia University
Member of ReSMiQ since 2007

Glenn Cowan received the Ph.D. degree in Electrical Engineering from Columbia University, New York, USA. He is currently an Associate Professor in the VLSI research group in the Department of Electrical and Computer Engineering at Concordia University, Montreal, Canada. He worked in the Communications Technology Department at the IBM T. J. Watson Research Center, NY, where his research activities included CMOS circuits for high-speed communications, design for manufacturability, and circuits for the measurement of process variability. His current research interests are in low-power mixed-signal circuits for wireless, wireline, and optical communication, as well as mixed-signal computation. Dr. Cowan has published several refereed papers in journals and international conferences and holds 1 patents. More details

Below is a selection of publications in recent years followed by representative work.

  1. Moayedi Pour Fard, C. Williams, G. Cowan, and O. Liboiron-Ladouceur, “High-speed grating-assisted all-silicon photodetectors for 850 nm applications,” Optical Society of America’s Optics Express, vol. 25, no. 5, pp. 5107-5118, 2017.
  2. Moayedi Pour Fard, G. Cowan, and O. Liboiron-Ladouceur, “Responsivity optimization of a high-speed Germanium-on-Silicon photodetector,” Optical Society of America’s Optics Express, vol. 24, no. 24, pp. 27738-27752, 2016.
  3. Williams, B. Banan, G. Cowan and O. Liboiron-Ladouceur, "A Source-Synchronous Architecture Using Mode-Division Multiplexing for On-Chip Silicon Photonic Interconnects," in IEEE Journal of Selected Topics in Quantum Electronics, vol. 22, no. 6, pp. 473-481, Nov.-Dec. 2016.
  4. Moazzeni, M. Sawan and G. Cowan, "An Ultra-Low-Power Energy-Efficient Dual-Mode Wake-Up Receiver," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 2, pp. 517-526, Feb. 2015.
  5. E. Esmaeili, A. J. Al-Kahlili and G. Cowan, "Low-Swing Differential Conditional Capturing Flip-Flop for LC Resonant Clock Distribution Networks," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 8, pp. 1547-1551, Aug. 2012.
  6. E. Esmaeili, A. j. Al-Khalili and G. Cowan, "Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks," in IET Computers & Digital Techniques, vol. 4, no. 6, pp. 499-514, Nov. 2010.
  7. Y. Shen, B. Hraimel, X. Zhang, G. Cowan, K. Wu, and T. Liu, “A Novel Analog Broadband RF Predistortion Circuit to Linearize Electroabsorption Modulator in Multiband OFDM Ultra-Wideband Radio over Fiber System,” IEEE Trans. on Microwave Theory and Techniques, vol. 58, no. 11, part 2, , pp. 3327-3335, Nov. 2010


A Source-Synchronous Architecture Using Mode-Division
Multiplexing for On-Chip Silicon Photonic Interconnects

A source-synchronous interconnect using mode-division multiplexing (MDM) for potential use in on-chip applications is experimentally demonstrated using a 3-mode 750 μm Silicon photonics structure. Results are presented for simultaneous transmission of two data channels on two separate modes (bit error rate <; 10-12 at 10 Gb/s) sampled by an optically forwarded clock sent on a third separate mode. Performance assessment of the mode assignment for the clock is presented. The investigation shows that an optimum clock placement is important at wavelengths where modal crosstalk is higher. For example, at 1553 nm, the clock's jitter decreases from 45 ps down to 2.7 ps where the clock is encoded on a mode with high crosstalk (-18.6 dB) to one that has less crosstalk (-28.6 dB). At 1560 nm where modal crosstalk is better, the clock's jitter is 2.6 ps (-27.8 dB crosstalk) and 1.1 ps (-34 dB crosstalk) without and with optimum clock placement, respectively. With proper clock to mode assignment, the optical interconnect becomes functional across an optical bandwidth of 11 nm enabling MDM-wavelength-division multiplexing architectures.

Fig. 1. Proposed MDM architecture. The transmit side (TX) modulates data on single-mode waveguides (SM WG), which are multiplexed onto different modes (1 to N), along with the transmit clock on a separate mode (Mode 1 in this illustration). On the receive side (RX), the optical signals are optically mode-demultiplexed onto SM WG, and then electrically recovered using the forwarded clock which is deskewed (phase aligned) and used in the latches.

Fig. 2. Microscope images of the SiP 750 μm optical interconnect. Distance between grating couplers (127 μm) given for scale.

Fig. 3. Electrical eye diagrams of data transmission at 1553 nm captured with oscilloscope triggered by the forwarded (a) optical clock on mode 2 and (b) electrical clock bypassing the DUT. As observed, the method of sending the clock notably changes the eye. Closure of the eye horizontally is caused by modal crosstalk induced jitter.